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Samsung's 5-Layer EUV DDR5 in Production, DDR5-7200 ICs Incoming

by tom'sHARDWARE

Samsung's 14nm five-layer EUV fabrication process will enable DDR5-7200 chips.

Samsung this week said that it had initiated mass production of DDR5 memory using its latest 14nm fabrication process that uses extreme ultraviolet (EUV) lithography on five layers. Extensive usage of EUV enables Samsung to reduce the die size of its memory chips without using multi patterning with deep ultraviolet (DUV) lithography tools, which increases yields and reduces cycle time. Eventually the technology will be used to make DDR5-7200 chips. 

Samsung's 14nm five-layer EUV manufacturing technology (D1a) enables the company to reduce power consumption of DRAM by nearly 20% and increase wafer productivity (i.e., reduce/optimize die size to produce more DRAM dies on a single 300-mm wafer) by about 20% when compared to its previous-generation DRAM node. The new technology will be Samsung's work horse for a couple of years and the company has a rather extensive roadmap for the node. 

Samsung does not disclose which DDR5 memory chips it produces using its D1a fabrication process, but says that eventually the technology will be used to make DRAM ICs featuring an up to 7200 MT/s data transfer rate and an up to 24Gb density (something the firm has already announced). Such memory chips will allow Samsung and its partners to offer 24GB, 48GB, 96GB, 192GB or 384GB memory modules for client and server applications.  

Samsung has been experimenting with EUV manufacturing technologies for DRAM for quite a while. The company shipped its first commercial DDR4 modules based on ICs produced using D1x, an EUV-enhanced fabrication process back in early 2020. Since then, the company's scientists continued to experiment with EUV for DRAM and the pinnacle of their work is the start of mass production using the D1a node. 

At present Samsung is the only company to use EUV for five layers. SK Hynix currently makes LPDDR4 using its 10nm-class EUV-enhanced process (1anm) and plans to start volume production of DDR5 chips using this technology by the end of the year. By contrast, Micron is only beginning its work with ASML's Twinscan NXE:3600 EUV scanner and intends to deploy its EUV-based process only sometime in 2024. 

"We have led the DRAM market for nearly three decades by pioneering key patterning technology innovations," said Jooyoung Lee, Senior Vice President and Head of DRAM Product & Technology at Samsung Electronics. "Today, Samsung is setting another technology milestone with multi-layer EUV that has enabled extreme miniaturization at 14nm — a feat not possible with the conventional argon fluoride (ArF) process. Building on this advancement, we will continue to provide the most differentiated memory solutions by fully addressing the need for greater performance and capacity in the data-driven world of 5G, AI and the metaverse."

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